1. Field of the Invention
The present invention relates to a frequency multiplier device and more particularly to a frequency multiplier device suitably used in mobile communication devices.
2. Description of the Related Art
In recent mobile communication devices, including cellular phones, the number of transmission carrier frequency bands has been increased for effective use of frequencies. The mobile communication devices are more capable of switching between carrier frequencies according to usage than ever. Accordingly, the frequency multiplier devices are required to appropriately select among a plurality of multiplied frequencies. On the other hand, there exist continuous needs for such devices to incorporate as many functions as possible and as small housing as possible. In addition, the portable communication devices for mobile communication such as cellular phones are now often evaluated by low current consumption during calling, which is an important index with respect to the portability.
In order to use and select a plurality of frequencies required for the mobile communication, a solution according to the prior art is to include a number of frequency multiplier devices with different multiplication index one for each frequency, as many as required. Another solution is to use a circuit as shown in FIG. 9.
FIG. 9 shows a conventional frequency multiplier device 100. The frequency multiplier device 100 includes a frequency multiplier 102 with a multiplier factor n, a mixer circuit 101, a filter circuit A 104, another filter circuit B 105, two other filter circuits, and a switch circuit 103 for selectively connecting to one of filter circuits 104 and 105. Input frequency signals at a frequency f are input into the frequency multiplier 102 and into the mixer circuit 101. Output multiplied signals at a frequency nf, which has been multiplied by the frequency multiplier 102 by multiplier factor n, are also input into the mixer circuit 101. The mixer circuit 101 mixes two input signals f and nf to yield an output including two mixed signals, one having a frequency (nxe2x88x921)f, another having a frequency (n+1)f. The output signals have spectra as shown in FIG. 10. One signal output having the frequency (nxe2x88x921)f has a power level equal to another signal output having the frequency (n+1)f. No selectivity is present between those signals. Thus, either of frequency signal is extracted from the output signals having two frequency signals (nxe2x88x921)f and (n+1)f mixed. A switch circuit 103 arranged in the following stage of the mixer circuit 101 is used for selectively connecting to one of the two filter circuits 104 and 105. More specifically, The filter circuit A 104 selects and passes only the signal of frequency (nxe2x88x921)f while the filter circuit B 105 selects and passes the signal of frequency (n+1)f. The switch circuit 103 selects either of filters to output the signal of one desired frequency.
Another possible solution for implementing a frequency selection is based on a PLL synthesizer.
However, in the mobile communication, it is a problematic method to allocate frequency multiplier devices to respective carrier frequencies. That is, a mobile communication device requires a plurality of frequency multiplier devices, which results in a larger scale of circuitry. The structure such as the above may prevent devices from being smaller. In addition, the power consumption of the device as the sum of power consumption in each of frequency multiplier devices may be larger than desired for implementing a lower power consumption rate in a portable device, such as cellular phones.
The method shown in FIG. 9 needs filter circuits 104, 105 for every output frequencies (nxe2x88x921)f and (n+1)f in order to select a desired output signal frequency. In addition, the switch circuit 103 for selecting a plurality of filter circuits 104, 105 is required. Furthermore, another filter circuit needs to be added for selecting an output signal of output frequency nf. As a result, similar to above conventional solutions, the scale of circuitry may be enlarged whereby the device cannot be built smaller, and the power consumption may be increased whereby the lower power consumption of the device is not realized.
When using a PLL synthesizer, some analog components including a charge pump circuit and a low pass filter are indispensable other than a PLL synthesizer composed of digitally controlled components such as frequency dividers and counter circuits. In addition, other circuit components such as voltage-controlled oscillators and prescallers are also necessary, which must operate at a very high rate. Consequently, the control system for each circuit block is complicated, thus enlarge the circuit scale and increase the power consumption, which results in a difficulty of achievement of the contemplated device with a smaller size and lower power consumption.
The present invention has been made in view of the above circumstances and has an object to overcome the above problems known in the prior art and to provide a frequency multiplier device which operates with lower power consumption, and which selects and outputs one of a plurality of multiplication frequencies.
To achieve the objects and in accordance with the purpose of the invention, as embodied and broadly described herein, the frequency multiplier device and frequency multiplier circuit in accordance with one aspect of the present invention, comprise:
a frequency multiplier for multiplying an input frequency signal by a predetermined multiplier to output an output multiplied signal;
a mixer circuit for mixing the input frequency signal and the output multiplied signal; and
a multiple selector circuit for selecting one of the mixing characteristics of the mixer circuit to output an output frequency signal.
The frequency multiplier device uses its own multiple selector circuit to select one of mixing characteristics of the mixer circuit, without using an external circuit for selection. The frequency multiplier device therefore may select and output a desired output frequency signal with a predetermined multiplier from the mixing signal of the input frequency signal mixed with output multiplied signals.
Now referring to the accompanying drawings, FIG. 1 shows the principle of operation in accordance with the present invention set forth in claim 1, and FIG. 2 shows the output spectra. The frequency multiplier device 0 shown in FIG. 1 has an input frequency signal f (the frequency of which is f) fed to the frequency multiplier 102 of n multiplication as well as to the mixer circuit 1. In addition, an output multiplied signal nf (the frequency of which is nf) multiplied by the multiplier factor n by the frequency multiplier 102 is also fed to the mixer circuit 1. The mixer circuit 1 intermixes two signals, namely, the input frequency signal f and the output multiplied signal nf. The multiple selector circuit 3 selects a mixing characteristic of the mixer circuit 1 such that the multiplication of frequency of output frequency signal fOUT selectively output from the mixer circuit is be either one of (nxe2x88x921), n, or (n+1).
The spectra of output frequency signal fOUT is shown in FIG. 2. The figure indicates that the selection of mixing characteristics of the mixer circuit 1 by the multiple selector circuit 3 allows the power level of either one of (nxe2x88x921)f, nf, or (n+1)f to be selectively output.
Thus this configuration may selectively output the output frequency signal fOUT without adding any filter circuit in the following stage.
As can be seen, the selection of mixing characteristics of the mixer circuit allows picking up one frequency signal out of a plurality of frequency signals generated between the original input frequency signal and the output multiplied signal to output as the final output frequency signal. In this manner, there is no need to have one frequency multiplier device for each of frequencies used, as well as to extract or select an output signal from the mixer circuit with an externally equipped filter circuit or the like. In addition, a circuit configuration of a complex control system such as a PLL frequency synthesizer can be omitted. Therefore, the circuitry of a frequency multiplier device to selectively output one among a plurality of frequency signals may become compact, allowing the multiplier device to be much smaller than ever. Also, a compact circuit configuration may permit decreasing the power consumption for the circuit operation, so as to be able to implement a configuration conforming to the requirement of lowering power consumption. Furthermore, a complex control system may be unnecessary in this circuit configuration which is much simpler in the circuit operation so that a much stable operation can be estimated.
Therefore the present invention may provide a frequency multiplier device, which is compact, consumes less power, operates much stably, and which may be preferable to use in a mobile communication device, in particular in a portable device such as a cellular phone.
The above and further objects and novel features of the invention will more fully appear from following detailed description when the same is read in connection with the accompanying drawings. It is to be expressly understood, however, that the drawings are purpose of illustration only and not intended as a definition of the limits of the invention